Position: DFT Engineer/Lead
Experience: 4-7 yrs
Qualification: B.Tech/B.E (ECE/EE)/M.S/M.Tech (VLSI/Digital Electronics)
• Post Silicon Validation, ATE Debug and Support are needed.
• Strong hands on Experience using Standard EDA Tools like Logic Vision, Mentor and Synopsys.
• Strong understanding & hands on experience with industry standard DFT techniques such as boundary scan, Memory BIST, BISA and BIRA, Scan/ Compression/ ATPG/ At-speed Fault simulation and Logic BIST and BIST for high speed serial links.
• Very good understanding of the complete Logic design, Modeling, RTL-Implementation & Verification, Logic Synthesis, Logic Equivalent Checking, Static Timing Analysis, Signal Integrity checks, & Backend timing closure.
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Tel: 91-80-4282-1616 ,