Position: DFT Engineer/Lead
Qualification: B.Tech/B.E (ECE/EE)/M.S/M.Tech (VLSI/Digital Electronics)
Experience: 4-7 yrs
Job Description: Ideal Candidate will be part of the DFT team, providing DFT services to a wide range of silicon companies. He/She will work on all aspects of DFT(Logic bist, Memory BIST, , Boundary Scan, High speed interface BIST, Full Scan, Scan compression, ATPG and ATE Support)
· Strong hands on Experience using Standard EDA Tools like Logic Vision, Mentor and Synopsys.
· Strong understanding & hands on experience with industry standard DFT techniques such as boundary scan, Memory BIST, BISA and BIRA, Scan/ Compression/ ATPG/ At-speed Fault simulation and Logic BIST and BIST for high speed serial links.
· Post Silicon Validation, ATE Debug and Support are needed.
· Very good understanding of the complete Logic design, Modeling, RTL-Implementation & Verification, Logic Synthesis, Logic Equivalent Checking, Static Timing Analysis, Signal Integrity checks, & Backend timing closure.
Thanks & Regards,